ÿØÿà JFIF      ÿÛ C      

!"$"$ÿÛ C  ÿÂ p " ÿÄ              ÿÄ             ÿÚ    ÕÔË®
(%	aA*‚XYD¡(J„¡E¢RE,P€XYae )(E¤²€B¤R¥	BQ¤¢ X«)X…€¤   @  

  ..............................................................................................................................................................................
.............................................................................                                                  
                                                                                                                                                                                     ÿØÿà JFIF      ÿÛ C      

!"$"$ÿÛ C  ÿÂ p " ÿÄ              ÿÄ             ÿÚ    ÕÔË®
(%	aA*‚XYD¡(J„¡E¢RE,P€XYae )(E¤²€B¤R¥	BQ¤¢ X«)X…€¤   @  

  ..............................................................................................................................................................................
.............................................................................                                                  
                                                                                                                                                                                     config DRM_ZYNQMP_DPSUB
	tristate "ZynqMP DisplayPort Controller Driver"
	depends on ARCH_ZYNQMP || COMPILE_TEST
	depends on COMMON_CLK && DRM && OF
	depends on DMADEVICES
	depends on PHY_XILINX_ZYNQMP
	depends on XILINX_ZYNQMP_DPDMA
	select DMA_ENGINE
	select DRM_GEM_CMA_HELPER
	select DRM_KMS_CMA_HELPER
	select DRM_KMS_HELPER
	select GENERIC_PHY
	help
	  This is a DRM/KMS driver for ZynqMP DisplayPort controller. Choose
	  this option if you have a Xilinx ZynqMP SoC with DisplayPort
	  subsystem.
